{"id":5549,"date":"2024-09-10T13:01:01","date_gmt":"2024-09-10T05:01:01","guid":{"rendered":""},"modified":"2024-09-10T13:01:01","modified_gmt":"2024-09-10T05:01:01","slug":"Tessent Mbist(1)Memory\u5206\u7ec4\u53caDFTSpec\u7f16\u8f91","status":"publish","type":"post","link":"https:\/\/mushiming.com\/5549.html","title":{"rendered":"Tessent Mbist(1)Memory\u5206\u7ec4\u53caDFTSpec\u7f16\u8f91"},"content":{"rendered":"

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    \n
  1. \u8bbe\u8ba1\u548c\u5e93\u7684\u9700\u6c42<\/li>\n
  2. \u6307\u5b9a\u9a8c\u8bc1MBIST\u7684\u9700\u6c42<\/li>\n
  3. \u521b\u5efa\u914d\u7f6eMBIST\u7684DFTspec<\/li>\n
  4. process MBIST\u7684DFTspec<\/li>\n<\/ol>\n<\/blockquote>\n

    design & library<\/h4>\n

    \u52a0\u8f7d\u8bbe\u8ba1\u4e0ememory \u5e93;
    \u53ef\u4ee5\u4f7f\u7528 read_core_descriptions<\/em> \u547d\u4ee4\u8bfb\u53d6\u5185\u5b58\u4e2dBIST logicvision\u8bbe\u8ba1\u6d41\u7a0b\u4e2d\u7684\u65e7\u6a21\u578b.\u65e7\u6a21\u578b\u4f1a\u8f6c\u5316\u4e3aTCD\u7684\u65b0\u7684\u63cf\u8ff0.\u9700\u8981\u6ce8\u610f\u7684\u662f \u9700\u8981\u5728logic vision MemoryTemplate\u4e2d\u6307\u5b9acell name;<\/p>\n

    \u5728gate-level\u7684\u8bbe\u8ba1\u63d2\u5165\u6d41\u7a0b\u4e2d,\u9700\u8981\u8bfb\u53d6Tessent\u7684\u5355\u5143\u5e93.\u5bf9\u4e8e\u9876\u5c42\u8bbe\u8ba1\u7684\u63d2\u5165,\u5fc5\u987b\u5305\u542bpad\u5355\u5143\u5e93;
    \u5bf9\u4e8e RTL-level\u7684\u8bbe\u8ba1\u6d41\u7a0b,\u662f\u4e0d\u9700\u8981\u4e0a\u8ff0\u7684\u5355\u5143\u5e93\u7684\u76f4\u5230testbench simulation\u8fd9\u4e00\u6b65;<\/p>\n

    MBIST requirments<\/h4>\n
    #\u8bbe\u7f6edftspec\u7684\u9700\u6c42 set_dft_specification -memory_test on #\u5982\u679c\u4f60\u5b58\u5728 \u53ef\u4fee\u590d\u7684memory,\u5c31\u5fc5\u987b\u6307\u5b9aMemory repair\u7684\u9700\u6c42 #\u5f53\u524d\u7684MBIST\u6d41\u7a0b\u4e0d\u5141\u8bb8\u9644\u52a0\u7684Memory repair\u903b\u8f91\u72ec\u7acb\u4e8eBIST\u7684\u903b\u8f91; <\/code><\/pre>\n
    \u52a0\u8f7dlayout\u5e03\u5c40\u4fe1\u606f;<\/h5>\n
    Memory\u7684\u7269\u7406\u5e03\u5c40\u4fe1\u606f\u662f\u5212\u5206Memory controler\u7684\u4f17\u591a\u56e0\u7d20\u4e4b\u4e00;
     \u5176\u4ed6\u56e0\u7d20\u5305\u62ec: power consumption,power domain,\u6d4b\u8bd5\u65f6\u95f4\u9884\u7b97;<\/p>\n
    #\u4f7f\u7528 read_def #\u547d\u4ee4\u53bb\u52a0\u8f7dlayout\u4fe1\u606f; #\u4f7f\u7528 set_memory_instance_options -physical_cluster_size_ratio 10 #\u8bbe\u7f6e\u7269\u7406\u7c07\u7684\u5927\u5c0f,\u4ee5\u82af\u7247\u5bf9\u89d2\u7ebf\u767e\u5206\u6bd4\u8868\u793a\u7269\u7406\u7c07\u7684\u5927\u5c0f; <\/code><\/pre>\n
    \u52a0\u8f7dpower domain\u7684\u4fe1\u606f<\/h5>\n
    read_upf <\/code><\/pre>\n
    \u6dfb\u52a0\u65f6\u949f<\/h5>\n
    #\u4f7f\u7528 add_clock #\u544a\u8bc9tessent\u5de5\u5177\u6240\u8981\u4f7f\u7528\u7684\u65f6\u949f\u548c\u4ed6\u4eec\u7684\u9891\u7387; #\u8fd9\u4e9b\u4fe1\u606f\u4f1a\u5728\u4e4b\u540e\u7684DRC\u4e2d\u4f7f\u7528,\u4e5f\u4f1a\u5173\u7cfb\u5230Memory controller\u7684\u5206\u7ec4; <\/code><\/pre>\n
    \u66f4\u6539\u9ed8\u8ba4\u7684DFTSpec<\/h5>\n
    \u6709\u4e24\u79cd\u65b9\u6cd5\u66f4\u6539\u9ed8\u8ba4\u7684DFTspec;\u4e00\u662f\u76f4\u63a5\u4fee\u6539\u9ed8\u8ba4\u7684DFTspec\u6587\u4ef6\u7136\u540e\u52a0\u8f7d\u5230tessent\u4e2d\u53bb;\u800c\u662f\u4f7f\u7528set_defaults_value\u6216\u8005\u662f\u66f4\u901a\u7528\u7684\u6307\u4ee4set_config_value,\u53bb\u4fee\u6539\u5404\u79cd\u5c5e\u6027\u7684\u503c;<\/p>\n
    \u5728DRC\u4e4b\u524d\u6dfb\u52a0\u7ea6\u675f<\/h5>\n
    \u5982\u4f55\u8bbe\u7f6e\u4ec5\u5f71\u54cd\u4e00\u4e2a\u6216\u8005\u4e00\u7ec4Memory\u7684\u66f4\u6539;
     \u5927\u591a\u6570\u4f7f\u7528 set_memory_instance_options\u547d\u4ee4\u7684\u66f4\u6539\u53ea\u6709\u5728design rule check\u4e4b\u540e\u624d\u80fd\u53ef\u89c1;<\/p>\n
    example:
     \u4f7f\u7528 set_memory_instance_options \u547d\u4ee4\u4e2d\u7684-use_in_memory_bist_dft_specification \u7684\u9009\u9879
     ,\u4e3a\u4e00\u4e2a\u6307\u5b9a\u7684memory \u505a\u914d\u7f6e<\/p>\n
    \u521b\u5efa \u4fee\u6539 \u9a8c\u8bc1MBIST\u7684DFT Specification;<\/h4>\n
    \u4e00\u65e6\u5b8c\u6210\u8bbe\u8ba1\u89c4\u5219\u68c0\u67e5\u5c31\u53ef\u4ee5\u5f00\u59cb\u521b\u5efa DFTSpec
     \u8fd9\u4e00\u9636\u6bb5\u6bd4\u8f83\u91cd\u8981\u7684\u547d\u4ee4\u5305\u62ec:<\/p>\n
    report_memory_instance get_memory_instance_option create_dft_specification #\u4ee5\u53cadftspec\u4fee\u6539\u6240\u4f7f\u7528\u7684\u547d\u4ee4 add_config_element get_config_value set_config_value #\u4ee5\u53ca\u4f7f\u7528ui\u5c55\u793adftspec\u7684\u547d\u4ee4 display_specification <\/code><\/pre>\n
    \u5728\u521b\u5efadftspec\u4e4b\u524d\u6dfb\u52a0\u7ea6\u675f<\/h5>\n
    \u6709\u4e9b\u7ea6\u675f\u5bf9\u4e8edftspec\u5b58\u5728\u5168\u5c40\u7684\u5f71\u54cd, \u4f60\u53ef\u4ee5\u4f7f\u7528 set_memory_instance_options\u547d\u4ee4\u53bb\u4fee\u6539\u8fd9\u4e9b\u7ea6\u675f.\u4e0b\u9762\u4e3e\u4e00\u4e2a\u4f8b\u5b50\u5c55\u793a\u4f60\u6539\u53d8\u7684\u52a0\u8f7d\u7684power domain\u7684\u4fe1\u606f\u6240\u9700\u8981\u7684\u6b65\u9aa4;
     check_design_rule\u6307\u5b9a\u4f1a\u5206\u6790\u8bbe\u8ba1,\u5e76\u5c06power domain\u7684\u4fe1\u606f\u9644\u52a0\u5230\u6bcf\u4e00\u4e2aMemory instance\u4e0a;\u5982\u679c\u4f60test setup\u4f7f\u7528\u5176\u4ed6\u7684power domain<\/p>\n
    \u53c2\u6570\u9009\u62e9\u5bf9\u6027\u80fd\u548c\u9762\u79ef\u7684\u5f71\u54cd<\/h4>\n
    DFTspec\u4e2d\u7684\u4e00\u4e9b\u53c2\u6570\u4f1a\u5bf9\u8bbe\u8ba1\u7684\u6027\u80fd\u548c\u9762\u79ef\u4ee5\u53ca\u5176\u4ed6\u65b9\u9762\u9020\u6210\u5f71\u54cd;<\/p>\n
    \u4e3a\u4e86\u83b7\u5f97\u66f4\u9ad8\u7684\u6d4b\u8bd5\u8986\u76d6\u7387,tessent\u5728\u505aMbist\u7684\u65f6\u5019\u4f1a\u6dfb\u52a0Memory bypas\u903b\u8f91\u4ee5\u53ca\u4e00\u4e9b\u7528\u4e8e\u89c2\u6d4b\u7684register,
     \u6211\u4eec\u53ef\u4ee5\u901a\u8fc7\u8c03\u6574bypass\u548cobservation register\u7684\u6570\u91cf\u6700\u5c0f\u5316Memory\u7684\u9762\u79ef.<\/p>\n
      \n
    1. \u51cf\u5c11\u540c\u6b65bypass register \u7684\u6570\u91cf.
       \u6bcf\u4e2a\u6570\u636e\u8f93\u51fa\u7aef\u53e3\u90fd\u9700\u8981\u4e00\u7ec4bypass register;\u5728tessent 2020.1\u7248\u672c\u4e4b\u524d,bypass register \u7684\u6570\u91cf\u662f\u548c\u5b58\u50a8\u5668\u7684\u5b57\u957f\u76f8\u7b49\u7684,\u73b0\u5728,\u5bf9\u4e8e\u6bcf\u4e2a\u6570\u636e\u8f93\u51fa\u7aef\u53e3\u4f4e\u5f00\u9500\u7684\u7279\u6027\u4f7f\u5f97\u5bc4\u5b58\u5668\u7684\u6570\u91cf\u4ece\u5b57\u957f\u964d\u4f4e\u5230\u4e861.<\/li>\n
    2. \u51cf\u5c11 control\/address observation register;
       \u5b58\u50a8\u5668\u7684\u63a7\u5236\u548c\u5730\u5740\u4fe1\u53f7\u4f1a\u88ab\u63a5\u7ba1\u5230observation register\u4e2d.\u57282020.1\u4e4b\u524d\u7684\u7248\u672c\u4e2d,\u4fe1\u53f7\u4e0e\u89c2\u6d4b\u5bc4\u5b58\u5668\u7684\u6bd4\u57282-8\u4e4b\u95f4(\u4e24\u4e2a\u4e2a\u4fe1\u53f7\u5bf9\u5e941\u4e2aobservation register),\u73b0\u5728,\u4f4e\u5f00\u9500\u7684\u7279\u6027\u4f7f\u5f97\u4e00\u4e2aMemory\u7684\u6240\u6709control\/address\u4fe1\u53f7\u90fd\u53ef\u4ee5\u8fde\u63a5\u5230\u4e00\u4e2aobservation register\u4e0a;<\/li>\n<\/ol>\n
      \u5173\u4e8ebypass\u548cobservation\u903b\u8f91;<\/h5>\n
      [\u5916\u94fe\u56fe\u7247\u8f6c\u5b58\u5931\u8d25,\u6e90\u7ad9\u53ef\u80fd\u6709\u9632\u76d7\u94fe\u673a\u5236,\u5efa\u8bae\u5c06\u56fe\u7247\u4fdd\u5b58\u4e0b\u6765\u76f4\u63a5\u4e0a\u4f20(img-IdkM8zLW-71)(evernotecid:\/\/B004F96B-9AA0-47D6-BD23-E56FA9C545DF\/appyinxiangcom\/\/ENResource\/p872)]
       dftspec\u4e2d\u7684\u8fd9\u4e9b\u5c5e\u6027\u4f1a\u5f71\u54cd\u5230 bypass \u548cobservation \u5bc4\u5b58\u5668\u7684\u6570\u91cf;
       \u9ed8\u8ba4, \u6bcf\u4e2a\u5b58\u50a8\u5668\u63a5\u53e3, \u89c2\u6d4b\u903b\u8f91\u7b80\u5316\u540e\u5730\u5740\u63a7\u5236\u4fe1\u53f7\u548c\u89c2\u6d4b\u5bc4\u5b58\u5668\u4e4b\u6bd4\u4e3a3,bypass logic\u4e0d\u505a\u7b80\u5316,\u7b49\u4e8e\u5b58\u50a8\u5668\u6570\u636e\u8f93\u51fa\u7aef\u53e3\u7684\u6570\u91cf;<\/p>\n
      \u8c03\u6574scan observation register \u7684\u6570\u91cf<\/h6>\n
      \u63d2\u5165\u89c2\u6d4b\u903b\u8f91\u662f\u53ef\u4ee5\u901a\u8fc7\u8bbe\u7f6eAdvanceOptions(observation_xor_size)\u5173\u95ed\u7684,\u8fd9\u4e2a\u9009\u9879\u662f\u901a\u8fc7XOR\u6811\u6765\u6307\u5b9a\u5730\u5740\u548c\u63a7\u5236\u4fe1\u53f7\u4e0e\u89c2\u6d4b\u5bc4\u5b58\u5668\u7684\u7f29\u51cf\u6bd4; \u8fd9\u4e2a\u7f29\u51cf\u6bd4\u4ece1:1\u4e00\u76f4\u53ef\u6269\u5927\u5230\u591a:1;<\/p>\n
      \u8c03\u6574 bypass register \u7684\u6570\u91cf<\/h6>\n
      \u5b58\u50a8\u5668 bypass\u903b\u8f91\u7684\u63d2\u5165\u53d6\u51b3\u4e8eMemory\u7684TCD\u4e2dTransparentmode\u5c5e\u6027\u51b3\u5b9a.DFTspec\u4e2d step\/MemoryInterface\/scan_bypass_logic\u5c5e\u6027\u53ef\u4ee5\u7528\u6765\u8986\u76d6TCD\u4e2d\u7684\u8bbe\u7f6e.<\/p>\n
      \u540c\u6b65bypass\u65b9\u6848\u662f\u9ed8\u8ba4\u548c\u6700\u5e38\u89c1\u7684\u65b9\u6848,\u5bf9\u4e8e\u4e00\u90e8\u65c1\u8def\u65b9\u6848,\u4e0d\u4f7f\u7528\u65c1\u8def\u5bc4\u5b58\u5668\u5c31\u53ef\u4ee5\u5b9e\u73b0XOR\u7ea6\u7b80.<\/p>\n
      DFTspec\u4e2d memoryInterface\/data_bits_per_bypass_signal \u5c5e\u6027\u7528\u6765\u6307\u5b9a\u7ec4\u5408\u5230\u4e00\u4e2aXOR tree\u4e2d\u7684\u6570\u636e\u8f93\u5165\u4fe1\u606f\u7684\u6570\u91cf,\u6b64\u8bbe\u7f6e\u5728\u4e3aRAM\u521b\u5efabypass logic\u65f6\u5341\u5206\u6709\u7528,\u5de5\u5177\u63d0\u4f9b\u4e86\u4e00\u4e2a\u7075\u6d3b\u7684\u533a\u95f4,1\u5bf91\u5230\u591a\u5bf91;
       \u548c observation register\u4e00\u6837, \u8981\u9650\u5236\u7f29\u51cf\u6bd4\u4f8b\u9700\u8981\u8003\u8651\u907f\u514d \u65c1\u8def\u5bc4\u5b58\u5668\u7684\u5168\u901f\u65f6\u5e8f\u8def\u5f84\u6bd4\u5b58\u50a8\u5668\u8def\u5f84\u66f4critical;<\/p>\n
      bypass& observation logic\u7f29\u51cf\u9650\u5236\u8003\u8651<\/h5>\n
        \n
      1. \u5f53 data_bits_per_bypass_signal \u5927\u4e8e1,\u7531\u4e8e\u5e94\u7528\u4e8e\u5b58\u50a8\u5668\u6247\u51fa\u7684\u529f\u80fd\u7535\u8def\u7684\u6570\u636e\u76f8\u5173\u6027,ATPG\u7684\u8986\u76d6\u7387\u53ef\u80fd\u4f1a\u53d7\u5230\u5f71\u54cd,\u8fd9\u79cd\u5f71\u54cd\u5bf9\u4e8e\u4e0d\u540c\u7684\u7535\u8def\u4e5f\u662f\u4e0d\u540c\u7684,\u800c\u4e14\u5f88\u96be\u627e\u5230\u5bfc\u81f4\u8986\u76d6\u7387\u964d\u4f4e\u7684\u6839\u672c\u539f\u56e0,\u5728debug poor test coverage\u65f6\u4f1a\u5f88\u56f0\u96be;<\/li>\n
      2. Memory \u8f93\u5165\u548cbypass&observation register\u4e4b\u95f4\u65f6\u5e8f\u7684\u4e0d\u540c\u4f1a\u5bfc\u81f4\u5728AC\u9636\u6bb5\u4ea7\u751f\u8fdd\u4f8b;\u7531\u4e8e XOR tree\u7684\u6df1\u5ea6,\u5230\u8fbebypass&observation register\u7684\u8def\u5f84\u8981\u6bd4\u5230\u8fbeMemory\u7684\u8def\u5f84(Memory input\u7684\u8def\u5f84)\u66f4critical;<\/li>\n
      3. \u5f53\u5b58\u50a8\u5668\u7684TCD\u4e2d DataOutStage(\u6570\u636e\u8f93\u51fa\u9636\u6bb5)\u6307\u5b9a\u4e3aStrobingFlop,memory bypass register\u4f1a\u88ab\u590d\u7528\u4e3a\u6d41\u6c34\u7ebf\u5c06Memory\u6570\u636e\u8f93\u51fa\u5230MBIST\u7535\u8def\u4e2d;\u5728\u8fd9\u6837\u7684\u914d\u7f6e\u4e0b,data_bits_per_bypass_signal\u5fc5\u987b\u6307\u5b9a\u4e3a1;\u5426\u5219\u4f1a\u5728DFTspec \u9a8c\u8bc1\u7684\u65f6\u5019\u62a5\u9519;<\/li>\n<\/ol>\n
        \u793a\u4f8b<\/h5>\n
        \u4e0d\u540c\u914d\u7f6e:<\/p>\n
          \n
        1. full observation register & reduced bypass register;<\/li>\n
        2. minimum observation register & bypass;
           3.disableling observation and bypass;<\/li>\n<\/ol>\n
          MemoryBIST\u7684\u5206\u7ec4\u89c4\u5219<\/h4>\n
          outline rule(\u5927\u81f4\u89c4\u5219)<\/h5>\n
          controller\u7684\u517c\u5bb9\u6027\u89c4\u5219\u8868\u793a\u4e3aCCRx;\u6b65\u9aa4\u7684\u517c\u5bb9\u6027\u89c4\u5219\u8868\u8ff0\u4e3aSCRx;<\/h5>\n
          CCR1<\/h6>\n
          \u4e0d\u540c\u79cd\u7c7b\u7684Memory\u5206\u914d\u7ed9\u4e0d\u540c\u7684\u63a7\u5236\u5668;<\/p>\n
          CCR2<\/h6>\n
          \u4f4d\u4e8e\u540c\u4e00\u4e2acontroller\u7684DRAMs\u5fc5\u987b\u6709\u4e00\u81f4\u7684\u884c\u5217\u5bbd\u5ea6\u548cbank dimensions;<\/p>\n
          CCR3<\/h6>\n
          Memory\u901a\u8fc7 physical region,clock domain,Memory cluster \u8fdb\u884c\u5206\u7ec4; \u7531\u591a\u4e2aclock domain \u9a71\u52a8\u7684multi-port memory,\u9009\u7528\u6700\u5feb\u7684clock domain\u8fdb\u884c\u5206\u7ec4;<\/p>\n
          CCR4<\/h6>\n
          \u6307\u5b9a\u4e0d\u540cgroup lable\u7684memory \u5206\u5230\u4e0d\u540c\u7684\u7ec4\u4e2d;<\/p>\n
          memory\u8fdb\u4e00\u6b65\u5212\u5206\u517c\u5bb9\u7ec4,\u4ee5\u4fbf\u4e8e\u5728\u5355\u4e2aMemory controller\u6b65\u9aa4\u4e2d\u5bf9\u4e00\u7ec4\u7684memory\u8fdb\u884c\u5e76\u884c\u6d4b\u8bd5;\u5982\u679c\u5e76\u884c\u6d4b\u8bd5\u4e0d\u540csize\u7684memory\u8fd8\u8981\u6bd4\u4e32\u884c\u6d4b\u8bd5\u4ed6\u4eec\u8bdd\u7684\u65f6\u95f4\u8981\u957f,\u90a3\u4e48\u6700\u597d\u628a\u4e0d\u540c\u5927\u5c0f\u7684Memory\u653e\u5230\u4e0d\u540c\u7684\u7ec4\u4e2d;\u8fd9\u7ecf\u5e38\u53d1\u751f\u5728\u4e00\u4e2aMemory\u7684\u884c\u5730\u5740\u5f88\u591a\u5217\u5730\u5740\u5f88\u5c11\u800c\u53e6\u4e00\u4e2a\u5217\u5730\u5740\u5f88\u591a\u884c\u5730\u5740\u5f88\u5c11\u7684\u60c5\u51b5\u4e0b;<\/p>\n
          SCR1<\/h6>\n
          \u6240\u6709\u7684memory\u5fc5\u987b\u4f7f\u7528\u76f8\u540c\u7684\u7b97\u6cd5;<\/p>\n
          SCR2<\/h6>\n
          \u6240\u6709\u7684Memory\u5fc5\u987b\u4f7f\u7528\u76f8\u540c\u7684operation set;<\/p>\n
          SCR3<\/h6>\n
          \u6240\u6709\u7684memory\u5fc5\u987b\u4e3a\u76f8\u540c\u7684\u79cd\u7c7b(SRAM ROM DRAM)<\/p>\n
          SCR4<\/h6>\n
          \u6240\u6709\u7684DRAMs \u5fc5\u987b\u4e3a\u76f8\u540c\u7684row column \u4ee5\u53cabank adress bits;<\/p>\n
          SCR5<\/h6>\n
          \u5bf9\u4e8e\u8ba1\u6570\u8303\u56f4,\u6240\u6709\u7684Memory\u7684column segments(\u5217\u6bb5)\u5fc5\u987b\u6709\u76f8\u540c\u7684low value, high value \u53ef\u4ee5\u4e0d\u540c;<\/p>\n
          SCR7<\/h6>\n
          Memory\u7684bit grouping\u5fc5\u987b\u5168\u90e8\u4e3a\u5076\u6570\u6216\u8005\u5947\u6570;<\/p>\n
          SCR8<\/h6>\n
          \u6240\u6709\u7684Memory\u5fc5\u987b\u6709\u4e00\u81f4\u7684bist_data_out_pipelining\u7684\u8bbe\u7f6e<\/p>\n
          SCR9<\/h6>\n
          \u6240\u6709\u7684Memory\u5fc5\u987b\u6709\u4e00\u81f4\u7684DataOutStage\u7684\u8bbe\u7f6e;<\/p>\n
          SCR10<\/h6>\n
          \u5185\u5b58\u7ec4\u7684\u5212\u5206\u8981\u4fdd\u8bc1\u6ca1\u6709\u8d85\u8fc7 Max_power_per_step\u548cmax_memories_per_step<\/p>\n
          \u521b\u5efaDFT spec<\/h4>\n
          set spec [create_dft_specification] #\u521b\u5efa\u4e00\u4e2a DFTSpec #\u5728\u8fd9\u6761\u547d\u4ee4\u7684\u6700\u540e,\u4f1a\u62a5\u544a\u5f53\u524dDFTSpec\u751f\u6210\u7684\u540d\u5b57 #tip: \u4f7f\u7528 tcl \u4e2d\u7684set \u547d\u4ee4\u53bb\u6355\u83b7 create_DFTSpec \u8fd4\u56de\u7684\u6570\u636e; #\u8bbe\u8ba1 \u4ec5\u5728process_dft_specification \u65f6\u53d1\u751f\u6539\u53d8 <\/code><\/pre>\n
          DFTSpec\u68c0\u67e5\u548c\u57fa\u672c\u7684\u7f16\u8f91<\/h5>\n
          Tessent\u5de5\u5177\u4f1a\u5206\u6790\u4f60\u8bbe\u7f6e\u7684\u4fe1\u606f\u548c\u7ea6\u675f;\u4e0b\u9762\u7684\u4f8b\u5b50\u4f1a\u5c55\u793a\u5982\u4f55\u68c0\u67e5\u548c\u4fee\u6539DFTSp<\/p>\n
          report_config_data $spec report_config_data $spec\/MemoryBist\/Controller(c1) #\u62a5\u544a\u6240\u6709\u672a\u6307\u5b9a\u7684\u914d\u7f6e(\u9ed8\u8ba4\u914d\u7f6e) report_config_data -show_unspecified <\/code><\/pre>\n
          re-creating the DFTspec<\/h4>\n
          \u4e00\u4e9b\u4fe1\u606f\u5c06\u4f60\u5728\u62a5\u544aDFTspec\u7684\u65f6\u5019\u624d\u80fd\u770b\u5230,\u50cf Memory\u7684\u5206\u7ec4\u4ec5\u5f71\u54cdDFT\u7684\u89e3\u51b3\u65b9\u6848,\u4f46\u53ea\u80fd\u5728\u521b\u5efa\u4e4b\u540e\u624d\u80fd\u770b\u51fa\u7ed3\u679c,\u4fee\u6539\u8fd9\u4e9b\u4fe1\u606f\u9700\u8981\u5bf9DFTspec\u8fdb\u5927\u91cf\u7684\u7f16\u8f91,\u66f4\u7b80\u5355\u7684\u65b9\u6cd5\u662f\u76f4\u63a5\u6539\u53d8\u8f93\u5165\u7684\u6570\u636e\u5e76\u91cd\u65b0\u521b\u5efaDFTspec;<\/p>\n
          \u4e0b\u9762\u7684\u4f8b\u5b50\u4e2d,\u4f60\u60f3\u79fb\u52a8\u4e00\u4e2aMemory\u5230\u4e00\u4e2a\u72ec\u7acb\u7684controller;<\/p>\n
          \u6539\u53d8\u7269\u7406\u7c07(physical cluster)\u4fe1\u606f\u5e76\u91cd\u65b0\u521b\u5efaDFTSpec<\/h5>\n
          report_config_data $spec\/MemoryBist\/Controller(c1) report_memory_instances -limit2 #\u62a5\u544a\u4e24\u4e2ainstance\u7684\u4fe1\u606f; set_memory_instance_options mem1 -physical_cluster_override MyCluster set spec [create_dft_spec -replace] #report_config_data\u4e00\u4e0b\u68c0\u67e5\u662f\u5426\u4fee\u6539\u6210\u529f <\/code><\/pre>\n
          \u9644\u52a0\u7684\u4fee\u6539DFTSpec\u7684\u65b9\u5f0f<\/h5>\n
          \u901a\u8fc7 Configuration Data Visualizer<\/h6>\n
          display_specification <\/code><\/pre>\n
          process_dft_specification<\/h4>\n
          \u8fd9\u91cc\u6ca1\u4ec0\u4e48\u597d\u8bf4\u7684<\/p>\n
          \n
          More articles You can follow the official account\uff1a\u201cIC\u7ec3\u4e60\u751f\u201d
           IC\u6c11\u5de5\u4e0d\u5b9a\u671f\u66f4\u65b0<\/p>\n<\/blockquote>\n","protected":false},"excerpt":{"rendered":"Tessent Mbist(1)Memory\u5206\u7ec4\u53caDFTSpec\u7f16\u8f91DFTspec\u4e2dmemoryInterface\/data_bits_per_bypass_signal\u5c5e\u6027\u7528\u6765\u6307\u5b9a\u7ec4\u5408\u5230\u4e00\u4e2aXORt...","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"_links":{"self":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/posts\/5549"}],"collection":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/comments?post=5549"}],"version-history":[{"count":0,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/posts\/5549\/revisions"}],"wp:attachment":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/media?parent=5549"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/categories?post=5549"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/tags?post=5549"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}