{"id":6362,"date":"2024-08-10T23:01:01","date_gmt":"2024-08-10T15:01:01","guid":{"rendered":""},"modified":"2024-08-10T23:01:01","modified_gmt":"2024-08-10T15:01:01","slug":"vxworks\u4efb\u52a1suspend_\u670d\u52a1\u4e3b\u673atask scheduler","status":"publish","type":"post","link":"https:\/\/mushiming.com\/6362.html","title":{"rendered":"vxworks\u4efb\u52a1suspend_\u670d\u52a1\u4e3b\u673atask scheduler"},"content":{"rendered":"

tIsr\u4f5c\u4e3a\u4e00\u4e2a\u7cfb\u7edf\u4efb\u52a1\uff0c\u770b\u5176\u6ce8\u91ca\uff0c\u77e5\u9053\u5176\u6709\u4e24\u79cd\u4f7f\u7528\u65b9\u5f0f\uff1a<\/strong><\/p>\n

This module operates in two distinct modes depending on the module's
configuration.  If the mode is configured for \"per-CPU\" deferral
tasks, this module creates (as needed) a single deferral task on each
CPU in the system.  This single queue handles all deferral operations
performed by device drivers that are servicing their interrupts on
that CPU.<\/p>\n

If the mode is configured for \"per-ISR\" deferral tasks, this module
creates a unique deferral task for each requester, and sets the CPU
affinity for the created task to the requested CPU index. <\/p>\n

<\/strong>\u8fd9\u4e2a\u4efb\u52a1\u5177\u4f53\u505a\u4ec0\u4e48\u4efb\u52a1\u5462\uff1f
\u4e3e\u4e00\u4e2a\u4f8b\u5b50\uff1a
ns16550vxInt\u4e32\u53e3\u4e2d\u65ad\u5904\u7406\u51fd\u6570\u4e2d\u4f7f\u7528\u5230\u4e86\u3002
\u5f53\u8fd9\u4e2a\u4e32\u53e3\u5904\u7406\u51fd\u6570\u53bb\u8bfb\u53d6\u8fd9\u4e2a\u4e32\u53e3\u4e2d\u7684\u503c\u65f6\uff0c\u5982\u679c\u51fa\u73b0\u4e86\u8d85\u65f6\u6ca1\u6709\u8bfb\u53d6\u5b8c\u6210\u7684\u60c5\u51b5\uff0c\u5c31\u4f1a\u628a\u8fd9\u4e2a\u4e2d\u65ad\u51fd\u6570\u5ef6\u540e\u6267\u884c\u3002
<\/strong><\/p>\n

LOCAL void ns16550vxbInt ( VXB_DEVICE_ID pDev ) { FAST NS16550VXB_CHAN * pChan = (NS16550VXB_CHAN *)(pDev->pDrvCtrl); \/* pointer to channel *\/ FAST volatile char intStatus; UINT8 iirValue, lsrValue; while ( pChan != NULL ) { VXB_NS16550_ISR_SET(pChan); switch (intStatus) { case IIR_RLS: REG_GET(LSR, pChan, lsrValue);\/*read LSR to reset interrupt *\/ intStatus = (char)lsrValue; break; case IIR_RDA: \/* received data available *\/ case IIR_TIMEOUT: { pChan->ier &= ~(RxFIFO_BIT); \/* indicate to disable Rx Int *\/ REG_SET(IER, pChan, pChan->ier); VXB_NS16550_ISR_CLEAR(pChan); \/*\u628a\u8fd9\u4e2a\u4efb\u52a1\u5ef6\u540e\uff0c\u7ee7\u7eed\u5904\u7406\u4e0b\u4e00\u4e2a\uff0c\u5269\u4e0b\u7684\u4efb\u52a1\u4ea4\u7ed9tIsr\u7cfb\u7edf\u4efb\u52a1\u6267\u884c*\/ isrDeferJobAdd (pChan->queueId, &pChan->isrDefRd); goto nextChan; } .... .... } <\/code><\/pre>\n
 \u8fd9\u76f8\u5f53\u4e8e\u5c31\u662f\u628a\u4e00\u4e2a\u4e2d\u65ad\u4e0a\u4e0b\u6587\u8f6c\u6362\u4e3a\u4efb\u52a1\u4e0a\u4e0b\u6587\u6765\u7ee7\u7eed\u6267\u884c\u3002
\n
 \u521d\u59cb\u5316\u8fc7\u7a0b <\/p>\n
<\/strong><\/p>\n
usrRoot--->usrIosCoreInit--->usrIsrDeferInit--->isrDeferLibInit<\/code><\/pre>\n
 <\/p>\n
STATUS isrDeferLibInit ( int mode \/* global deferral queue mode *\/ ) { \/*\u8bb0\u5f55\u8981\u4f7f\u7528\u7684\u6a21\u5f0f*\/ isrDeferLibMode = mode; \/*\u5982\u679c\u662fISR_DEFER_MODE_PER_CPU\u6a21\u5f0f\uff0c\u5c31\u4e3a\u6bcf\u4e00\u4e2acpu\u521b\u5efa\u4e00\u4e2a\u961f\u5217\uff0c\u6765\u5904\u7406\u8fd9\u4e2acpu\u4e0a\u6240\u6709\u7684\u5ef6\u540e\u51fd\u6570*\/ if (isrDeferLibMode == ISR_DEFER_MODE_PER_CPU) { pCpuQueueId = (ISR_DEFER_QUEUE_ID *) calloc (vxCpuConfiguredGet (), sizeof(*pCpuQueueId)); if (pCpuQueueId == NULL) return ERROR; } return OK; } <\/code><\/pre>\n
\/*\u521b\u5efa\u5904\u7406\u5ef6\u540e\u961f\u5217\u51fd\u6570*\/ LOCAL ISR_DEFER_QUEUE * isrDeferQueueCreate ( VXB_DEVICE_ID pInst, \/* VxBus device id of requester *\/ int intIdx, \/* interrupt source index *\/ int logicalCpuIndex \/* logical CPU index for deferral task *\/ ) { char taskName[32]; char *pT; cpuset_t affinity; ISR_DEFER_QUEUE *pQueue = malloc(sizeof(*pQueue)); lstInit (&pQueue->list); semBInit (&pQueue->syncSem, SEM_Q_PRIORITY, SEM_EMPTY); SPIN_LOCK_ISR_INIT (&pQueue->lock, 0); \/*\u6839\u636e\u4e0d\u540c\u7684cpu\u53f7\uff0c\u8bbe\u7f6e\u4e00\u4e2a\u72ec\u4e00\u65e0\u4e8c\u7684\u540d\u5b57\uff0ccpu0---tIsr0,cpu1---tIsr1*\/ strcpy (taskName, \"tIsr\"); pT = taskName + 4; if (pInst == NULL) \/* use CPU index only *\/ { *pT++ = '0' + logicalCpuIndex % 10; *pT = '\\0'; } else \/* use device unit number and interrupt index *\/ { *pT++ = '0' + pInst->unitNumber % 10; *pT++ = '0' + intIdx % 10; strcpy (pT, pInst->pName); } \/*\u521b\u5efa\u5bf9\u5e94\u5904\u7406\u7684\u7cfb\u7edf\u4efb\u52a1*\/ pQueue->tid = taskSpawn (taskName, ISR_DEFER_TASK_PRIO, ISR_DEFER_TASK_OPTS, 8192, (FUNCPTR) isrDeferTask, (int) pQueue, 0, 0, 0, 0, 0, 0, 0, 0, 0); ..... } <\/code><\/pre>\n
\/*\u5177\u4f53\u7684\u5904\u7406\u51fd\u6570*\/ LOCAL void isrDeferTask ( ISR_DEFER_QUEUE_ID queueId \/* queue for incoming deferred work *\/ ) { ISR_DEFER_JOB *pJob; \/*\u6b7b\u5faa\u73af\uff0c\u4e00\u76f4\u7b49\u5f85\u4efb\u52a1\u7684\u5230\u6765*\/ FOREVER { semBTake (&queueId->syncSem, WAIT_FOREVER); \/*\u83b7\u53d6\u4efb\u52a1\uff0c\u5e76\u6267\u884c*\/ FOREVER { SPIN_LOCK_ISR_TAKE (&queueId->lock); pJob = (ISR_DEFER_JOB *) lstGet (&queueId->list); SPIN_LOCK_ISR_GIVE (&queueId->lock); pJob->func (pJob->pData); } } } <\/code><\/pre>\n
\/*\u628a\u4e00\u4e2a\u4efb\u52a1\u6dfb\u52a0\u5230\u5ef6\u8fdf\u961f\u5217\u4e0a\u6765*\/ void isrDeferJobAdd ( ISR_DEFER_QUEUE_ID queueId, \/* queue allocated by isrDeferQueueGet *\/ ISR_DEFER_JOB * pJob \/* job to enqueue *\/ ) { SPIN_LOCK_ISR_TAKE (&queueId->lock); lstAdd (&queueId->list, &pJob->node); SPIN_LOCK_ISR_GIVE (&queueId->lock); \/*\u6dfb\u52a0\u5b8c\u6210\u540e\uff0c\u901a\u77e5isrDeferTask\u6709\u4efb\u52a1\u5230\u6765\u4e86*\/ semGive (&queueId->syncSem); } \/*\u4ece\u961f\u5217\u83b7\u53d6\u4e00\u4e2a\u4efb\u52a1*\/ ISR_DEFER_QUEUE_ID isrDeferQueueGet ( VXB_DEVICE_ID pInst, \/* VxBus device ID of requester *\/ int intIdx, \/* interrupt source index *\/ int logicalCpuIndex, \/* logical CPU index for deferral task *\/ int mode \/* deferral queue mode(for future use) *\/ ) { \/*\u5982\u679c\u662fISR_DEFER_MODE_PER_CPU\u6a21\u5f0f\uff0c\u5c31\u8fd4\u56de\u5bf9\u5e94cpu\u7684\u90a3\u4e2a\u961f\u5217*\/ if (isrDeferLibMode == ISR_DEFER_MODE_PER_CPU) { if (pCpuQueueId [logicalCpuIndex] == NULL) pCpuQueueId [logicalCpuIndex] = isrDeferQueueCreate (0, 0, logicalCpuIndex); return pCpuQueueId [logicalCpuIndex]; } \/*\u5982\u679c\u662f\u53e6\u4e00\u79cd\u6a21\u5f0f\uff0c\u5c31\u521b\u5efa\u8fd9\u4e2a\u8bbe\u5907\u5bf9\u5e94\u7684\u961f\u5217*\/ return isrDeferQueueCreate (pInst, intIdx, logicalCpuIndex); } <\/code><\/pre>\n
 <\/p>\n","protected":false},"excerpt":{"rendered":"vxworks\u4efb\u52a1suspend_\u670d\u52a1\u4e3b\u673atask schedulertIsr\u4f5c\u4e3a\u4e00\u4e2a\u7cfb\u7edf\u4efb\u52a1\uff0c\u770b\u5176\u6ce8\u91ca\uff0c\u77e5\u9053\u5176\u6709\u4e24\u79cd\u4f7f\u7528\u65b9\u5f0f\uff1aThismoduleoperatesintw...","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[],"_links":{"self":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/posts\/6362"}],"collection":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/comments?post=6362"}],"version-history":[{"count":0,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/posts\/6362\/revisions"}],"wp:attachment":[{"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/media?parent=6362"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/categories?post=6362"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/mushiming.com\/wp-json\/wp\/v2\/tags?post=6362"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}